CHES 2002

REDWOOD SHORES, CALIFORNIA, USA

Kaliski , Burton S. Jr.; Koç, Çetin K.; Paar, Christof (Eds.): Cryptographic Hardware and Embedded Systems - CHES 2002, 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers. Lecture Notes in Computer Science , Vol. 2523, Springer 2003, ISBN: 3-540-00409-2

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Invited Talk

• Jean-Jacques Quisquater: CHES: Past, Present, and Future p. 1

Attack Strategies

• Sergei P. Skorobogatov and Ross J. Anderson: Optical Fault Induction Attacks pp. 2 - 12
• Suresh Chari, Josyula R. Rao, Pankaj Rohatgi: Template Attacks pp. 13 - 28
• Dakshi Agrawal, Bruce Archambeault, Josyula R. Rao, et al.: The EM Side-Channel(s) pp. 29 - 45

Finite Field and Modular Arithmetic I

• Shay Gueron: Enhanced Montgomery Multiplication pp. 46 - 56
• Róbert Lórencz: New Algorithm for Classical Modular Inverse pp. 57 - 70
• Jean-Pierre Seifert: Increasing the Bitlength of a Crypto-Coprocessor pp. 71 - 81

Elliptic Curve Cryptography I

• Elisabeth Oswald: Enhancing Simple Power-Analysis Attacks on Elliptic Curve Cryptosystems pp. 82 - 97
• Elena Trichina and Antonio Bellezza: Implementation of Elliptic Curve Cryptography with Built-In Counter Measures against Side Channel Attacks pp. 98 - 113
• Catherine H. Gebotys and Robert J. Gebotys: Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor pp. 114 - 128
• Kouichi Itoh, Tetsuya Izu, Masahiko Takenaka: Address-Bit Differential Power Analysis of Cryptographic Schemes OK-ECDH and OK-ECDSA pp. 129 - 143

AES and AES Candidates

• A.K. Lutz, J. Treichler, F.K. Gürkaynak, et al.: 2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis pp. 144 - 158
• Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, et al.: Efficient Software Implementation of AES on 32-Bit Platforms pp. 159 - 171
• Sumio Morioka and Akashi Satoh: An Optimized S-Box Circuit Architecture for Low Power AES Design pp. 172 - 186
• Elena Trichina, Domenico De Seta, Lucia Germani: Simplified Adaptive Multiplicative Masking for AES pp. 187 - 197
• Jovan D. Golic and Christophe Tymen: Multiplicative Masking and Power Analysis of AES pp. 198 - 212

Tamper Resistance

• Andrew Huang: Keeping Secrets in Hardware: The Microsoft XboxTM Case Study pp. 213 - 227

RSA Implementation

• Bert den Boer, Kerstin Lemke, Guntram Wicke: A DPA Attack against the Modular Reduction within a CRT Implementation of RSA pp. 228 - 243
• Vlastimil Klíma and Tomás Rosa: Further Results and Considerations on Side Channel Attacks on RSA pp. 244 - 259
• Christian Aumüller, Peter Bier, Wieland Fischer, et al.: Fault Attacks on RSA with CRT: Concrete Results and Practical Countermeasures pp. 260 - 275

Finite Field and Modular Arithmetic II

• Colin D. Walter: Some Security Aspects of the M IST Randomized Exponentiation Algorithm pp. 276 - 290
• Marc Joye and Sung-Ming Yen: The Montgomery Powering Ladder pp. 291 - 302
• Kouichi Itoh, Jun Yajima, Masahiko Takenaka, et al.: DPA Countermeasures by Improving the Window Method pp. 303 - 317
• Martijn Stam and Arjen K. Lenstra: Efficient Subgroup Exponentiation in Quadratic and Sixth Degree Extensions pp. 318 - 332

Elliptic Curve Cryptography II

• Elisavet Konstantinou, Yiannis C. Stamatiou, Christos Zaroliagis: On the Efficient Generation of Elliptic Curves over Prime Fields pp. 333 - 348
• Nils Gura, Sheueling Chang Shantz, Hans Eberle, et al.: An End-to-End Systems Approach to Elliptic Curve Cryptography pp. 349 - 365
• Richard Schroeppel, Cheryl Beaver, Rita Gonzales, et al.: A Low-Power Design for an Elliptic Curve Digital Signature Chip pp. 366 - 380
• M. Ernst, M. Jung, F. Madlener, et al.: A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over GF (2n) pp. 381 - 399
• N. Boston, T. Clancy, Y. Liow, et al.: Genus Two Hyperelliptic Curve Coprocessor pp. 400 - 414

Random Number Generation

• Viktor Fischer and Miloš Drutarovský: True Random Number Generator Embedded in Reconfigurable Hardware pp. 415 - 430
• Werner Schindler and Wolfgang Killmann: Evaluation Criteria for True (Physical) Random Number Generators Used in Cryptographic Applications pp. 431 - 449
• Thomas E. Tkacik: A Hardware Random Number Generator pp. 450 - 453

Invited Talk

• Sanjay E. Sarma, Stephen A. Weis, Daniel W. Engels: RFID Systems and Security and Privacy Implications pp. 454 - 469

New Primitives

• Alexander Klimov and Adi Shamir: A New Class of Invertible Mappings pp. 470 - 483

Finite Field and Modular Arithmetic II

• Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, Erkay Savas, et al.: Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2n) pp. 484 - 499
• Johannes Wolkerstorfer: Dual-Field Arithmetic Unit for GF(p) and GF(2m) pp. 500 - 514
• Arash Reyhani-Masoleh and M.A. Hasan: Error Detection in Polynomial Basis Multipliers over Binary Extension Fields pp. 515 - 528
• D. Page and N.P. Smart: Hardware Implementation of Finite Fields of Characteristic Three pp. 529 - 539

Elliptic Curve Cryptography III

• Mathieu Ciet, Jean-Jacques Quisquater, Francesco Sica: Preventing Differential Analysis in GLV Elliptic Curve Scalar Multiplication pp. 540 - 550
• Jae Cheol Ha and Sang Jae Moon: Randomized Signed-Scalar Multiplication of ECC to Resist Power Attacks pp. 551 - 563
• Katsuyuki Okeya and Kouichi Sakurai: Fast Multi-scalar Multiplication Methods on Elliptic Curves with Precomputation Strategy Using Montgomery Trick pp. 564 - 578

Hardware for Cryptanalysis

• Richard Clayton and Mike Bond: Experience Using a Low-Cost FPGA Design to Crack DES Keys pp. 579 - 592
• Francois-Xavier Standaert, Gael Rouvroy, Jean-Jacques Quisquater, et al.: A Time-Memory Tradeoff Using Distinguished Points: New Analysis & FPGA Results pp. 593 - 609